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MAXSPCSPARTAN6+ Evaluation Kit
Quick Start
The MAXSPCSPARTAN6+ board can be plugged in to
Table_1._MAXSPCSPARTAN6+_Connector_
J2_Description
any Spartan 6 series FPGA evaluation board. A two-step
configuration is needed to use this card with the FPGA
evaluation board:
1) Place a shunt on pins 2-3 of header J7
(i.e., +3V3FMC to +3V3).
2) Place a shunt on pins 2-3 of header J6
(i.e., +5VREG to +5V).
Now connect the MAXSPCSPARTAN6+ board to the
FPGA EV kit. On power-up, LEDs D3, D4, and D5 should
glow, indicating a power-up state.
Detailed Description of Hardware
The MAXSPCSPARTAN6+ board is loaded with Maxim’s
ADCs and DACs and makes it very easy to integrate the
FPGA with any analog interface.
Communication with the MAX11612
The MAX11612 is a 12-bit, 2-/4-channel, I 2 C-compatible
ADC. The FPGA can drive commands for data
acquisition from the MAX11612 on the I 2 C slave address
0110100. The MAX11612 can work with the internal
reference of 4.096V or the external reference connected
at the AD3 port of J2. If internal reference is used; all
4 channels can be sampled from AD0–AD3. For more
information, refer to the MAX11612 IC data sheet.
Communication with the MAX11040
The MAX11040 is a 24-bit, 4-channel, SPI-compatible,
sigma-delta ADC with programmable output data rate.
It has an internal reference of 2.5V with Q 2.2V input
range. Input ports are marked as AD0-/AD0+ to AD3-/
J2_PIN_NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LABEL
+5V
N.C.
GND
DA0
GND
DA1
GND
DA2
GND
DA3
AD1
AD0
GND
I/O
AD3
AD2
FUNCTION
+5V, 250mA supply for external
circuit
Not connected
Ground
DAC output from channel 0 of U6
(MAX5135)
Ground
DAC output from channel 1 of U6
(MAX5135)
Ground
DAC output from channel 2 of U6
(MAX5135)
Ground
DAC output from channel 3 of U6
(MAX5135)
ADC input to channel 1 of U2
(MAX11612)
ADC input to channel 0 of U2
(MAX11612)
Ground
Digital input/output connected to
FMC connector at C18
ADC input to channel 3 of U2
(MAX11612)
ADC input to channel 2 of U2
(MAX11612)
AD3+ on J3. External reference can also be applied. The
MAX11040 does simultaneous sampling and data for all
4 channels and can be acquired in one read.
This ADC has four standard connections for SPI
communication. It also has an extra signal (DRDYOUT)
that interrupts the FPGA at every end-of-conversion
to sample the data. For more information, refer to the
MAX11040 IC data sheet.
Communication with the MAX5135
The MAX5135 is a 12-bit, 4-channel, voltage output,
SPI-compatible DAC. The MAXSPCSPARTAN6+ board
contains two MAX5135 ICs in a cascaded configura-
tion. The DAC channels are marked as DA0–DA3 on J2
and DA4–DA7 on J3. For more information, refer to the
MAX5135 IC data sheet.
2_ _ _______________________________________________________________________________________
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